Tuesday, July 7, 2020

I2C bus communication protocol

I2C bus communication protocols 
What is 12c:
-Inter Integrated Circuit
-Bidirectional Data Transfer
-Half duplex (have only one data line)
-Synchronous bus so data is clocked with clock signal
-Colock is controlled when data line is changed.

Speed of 12c:
low (under 100 kbps)
Fast (400 kbps)
high speed (3.4 mbps) 12C V2.0
2 wire communication:
SDA and SCL
Vtg high = 1, low = 0.
when SLC =1, it is valid data, when SLC=0, data is changed .
Basic protocol is master slave protocol
-Master controls the clock
-Slave device may hold the clock low to prevent data transfer
-no data transfer is present when clock is low
-It is a kind of wired and connection
-need to put pullup resistor
-default it is a open-drain or open-collector, so that adding pull up resistor is necessary so that it
will have only two states that is 1.floating high and 2.drive low
-Default state is high when no device is pulling it low.
Data Transfer:
  • It is byte oriented (bit)
  • Ack transmited by recepient of the data
  • MSB first
  • First byte is address
  • First byte is transmitted by master and addressed slave is the recepient
  • Next byte is based on the last bit (R/ W)
  • 7 bit address
  • 1 bit R/ W
  • 0-master write 
  • First byte is transmitted by master and addressed slave is the recepient
  • Next byte is based on the last bit (R/ W)
  • 7bit address
  • 1 bit R/ W
  • 0-master write
1-master receiver.

 
Full I2C transfer:

12C Multi Master:
  • It is a multi master bus
  • So bus arbitration is required
  • 1
  • When two device tries to drive SDA to different value
  • It is necessary to be sure that is not interfiering with another message
  • If a device is trying to send logic one but hears logic 0, it immediately stops transmission and gives
  • the other sender priority
  • Synch needed in SCL
Advantages:
  • Good for comm in On-board devices
  • mc
  • Easy to link multiple devices because of addressing scheme
  • Cost and complexity do not scale up with the num of devices
Disadvantages:
The complexity of supporting software components can be higher than that of scheme (EX. SPI-No
need of address in SPI)


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